iar的stm32f10x-皇冠最新app版本

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iar的stm32f10x_vector.c文件的定义

发布时间：2026-07-08 发布时间：
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  1. /******************** (c) 皇冠最新app版本 copyright 2008 stmicroelectronics ********************
  2. * file name : stm32f10x_vector.c
  3. * author : mcd application team
  4. * version : v2.0.3
  5. * date : 09/22/2008
  6. * description : stm32f10x vector table for ewarm5.x toolchain.
  7. * this module performs:
  8. * - set the initial sp
  9. * - set the initial pc == __iar_program_start,
  10. * - set the vector table entries with the exceptions isr address,
  11. * - configure external sram mounted on stm3210e-eval board
  12. * to be used as data memory (optional, to be enabled by user)
  13. * after reset the cortex-m3 processor is in thread mode,
  14. * priority is privileged, and the stack is set to main.
  15. ********************************************************************************
  16. * the present firmware which is for guidance only aims at providing customers
  17. * with coding information regarding their products in order for them to save time.
  18. * as a result, stmicroelectronics shall not be held liable for any direct,
  19. * indirect or consequential damages with respect to any claims arising from the
  20. * content of such firmware and/or the use made by customers of the coding
  21. * information contained herein in connection with their products.
  22. *******************************************************************************/
  23. /* includes ------------------------------------------------------------------*/
  24. #include "stm32f10x_lib.h"
  25. #include "stm32f10x_it.h"
  26. /* private typedef -----------------------------------------------------------*/
  27. typedef void( *intfunc )( void );
  28. typedef union { intfunc __fun; void * __ptr; } intvec_elem;
  29. /* private define ------------------------------------------------------------*/
  30. /* uncomment the following line if you need to use external sram mounted on
  31. stm3210e-eval board as data memory */
  32. /* #define data_in_extsram */
  33. /* private macro -------------------------------------------------------------*/
  34. /* private variables ---------------------------------------------------------*/
  35. /* private function prototypes -----------------------------------------------*/
  36. /* private functions ---------------------------------------------------------*/
  37. #pragma language=extended
  38. #pragma segment="cstack"
  39. void __iar_program_start( void );
  40. #pragma location = ".intvec"
  41. /* stm32f10x vector table entries */
  42. const intvec_elem __vector_table[] =
  43. {
  44. { .__ptr = __sfe( "cstack" ) },
  45. __iar_program_start,
  46. nmiexception,
  47. hardfaultexception,
  48. memmanageexception,
  49. busfaultexception,
  50. usagefaultexception,
  51. 0, 0, 0, 0, /* reserved */
  52. svchandler,
  53. debugmonitor,
  54. 0, /* reserved */
  55. pendsvc,
  56. systickhandler,
  57. wwdg_irqhandler,
  58. pvd_irqhandler,
  59. tamper_irqhandler,
  60. rtc_irqhandler,
  61. flash_irqhandler,
  62. rcc_irqhandler,
  63. exti0_irqhandler,
  64. exti1_irqhandler,
  65. exti2_irqhandler,
  66. exti3_irqhandler,
  67. exti4_irqhandler,
  68. dma1_channel1_irqhandler,
  69. dma1_channel2_irqhandler,
  70. dma1_channel3_irqhandler,
  71. dma1_channel4_irqhandler,
  72. dma1_channel5_irqhandler,
  73. dma1_channel6_irqhandler,
  74. dma1_channel7_irqhandler,
  75. adc1_2_irqhandler,
  76. usb_hp_can_tx_irqhandler,
  77. usb_lp_can_rx0_irqhandler,
  78. can_rx1_irqhandler,
  79. can_sce_irqhandler,
  80. exti9_5_irqhandler,
  81. tim1_brk_irqhandler,
  82. tim1_up_irqhandler,
  83. tim1_trg_com_irqhandler,
  84. tim1_cc_irqhandler,
  85. tim2_irqhandler,
  86. tim3_irqhandler,
  87. tim4_irqhandler,
  88. i2c1_ev_irqhandler,
  89. i2c1_er_irqhandler,
  90. i2c2_ev_irqhandler,
  91. i2c2_er_irqhandler,
  92. spi1_irqhandler,
  93. spi2_irqhandler,
  94. usart1_irqhandler,
  95. usart2_irqhandler,
  96. usart3_irqhandler,
  97. exti15_10_irqhandler,
  98. rtcalarm_irqhandler,
  99. usbwakeup_irqhandler,
  100. tim8_brk_irqhandler,
  101. tim8_up_irqhandler,
  102. tim8_trg_com_irqhandler,
  103. tim8_cc_irqhandler,
  104. adc3_irqhandler,
  105. fsmc_irqhandler,
  106. sdio_irqhandler,
  107. tim5_irqhandler,
  108. spi3_irqhandler,
  109. uart4_irqhandler,
  110. uart5_irqhandler,
  111. tim6_irqhandler,
  112. tim7_irqhandler,
  113. dma2_channel1_irqhandler,
  114. dma2_channel2_irqhandler,
  115. dma2_channel3_irqhandler,
  116. dma2_channel4_5_irqhandler,
  117. };
  118. #ifdef data_in_extsram
  119. #pragma language=extended
  120. __interwork int __low_level_init(void);
  121. #pragma location="icode"
  122. __interwork int __low_level_init(void)
  123. {
  124. /* fsmc bank1 nor/sram3 is used for the stm3210e-eval, if another bank is
  125. required, then adjust the register addresses*/
  126. /* enable fsmc clock */
  127. *(vu32 *)0x40021014 = 0x00000114;
  128. /* enable gpiod, gpioe, gpiof and gpiog clocks */
  129. *(vu32 *)0x40021018 = 0x000001e0;
  130. /* --------------- sram data lines, noe and nwe configuration ---------------*/
  131. /*---------------- sram address lines configuration -------------------------*/
  132. /*---------------- noe and nwe configuration --------------------------------*/
  133. /*---------------- ne3 configuration ----------------------------------------*/
  134. /*---------------- nbl0, nbl1 configuration ---------------------------------*/
  135. *(vu32 *)0x40011400 = 0x44bb44bb;
  136. *(vu32 *)0x40011404 = 0xbbbbbbbb;
  137. *(vu32 *)0x40011800 = 0xb44444bb;
  138. *(vu32 *)0x40011804 = 0xbbbbbbbb;
  139. *(vu32 *)0x40011c00 = 0x44bbbbbb;
  140. *(vu32 *)0x40011c04 = 0xbbbb4444;
  141. *(vu32 *)0x40012000 = 0x44bbbbbb;
  142. *(vu32 *)0x40012004 = 0x44444b44;
  143. /*---------------- fsmc configuration ---------------------------------------*/
  144. /*---------------- enable fsmc bank1_sram bank ------------------------------*/
  145. *(vu32 *)0xa0000010 = 0x00001011;
  146. *(vu32 *)0xa0000014 = 0x00000200;
  147. return (1);
  148. }
  149. #endif /*data_in_extsram*/
  150. /******************* (c) 皇冠最新app版本 copyright 2008 stmicroelectronics *****end of file****/
typedef void( *intfunc )( void );
定义一个新类型，这个类型是一个函数指针，指针指向的函数类型是void (void)型，
符合标准c
typedef union { intfunc __fun; void * __ptr; } intvec_elem;
定义一个新类型，这个类型是一个联合体，联合体有两个元素，一个元素类型是intfunc,一个元素类型是void *
符合标准c
#pragma language=extended
#pragma segment="cstack"
void __iar_program_start( void );
申明外部函数，extern可以用，也可以不用
符合标准c
#pragma location = ".intvec" // 下面的变量存放在段 .intvec
//iar扩展
/* stm32f10x vector table entries */
const intvec_elem __vector_table[] =
{
{ .__ptr = __sfe( "cstack" ) },
// { .__ptr = 常量 },
// 数组元素是联合体，联合体有两个元素，对联合体元素__ptr赋初值
//符合标准c
//__sfe( "cstack" ) 是段cstack的尾地址，更准确是段cstack下一个段的首地址（记忆中应该是这样）。
//iar扩展
__iar_program_start,
//数组元素是联合体，联合体有两个元素，对联合体第一个元素__fun赋初值
//完整的写法是 { .__fun= __iar_program_start },
//这里简写成__iar_program_start，是否符合标准c,有待考证
.....
}
}
补充：
对联合体第一个元素赋初值，可以简写。
{ .__fun= __iar_program_start },
//__fun是联合体第一个元素，可直接简写成__iar_program_start.
//符合标准c
__sfe是iar的“段操作符”segment operator。表示取某个段的后一个字节的地址。
比如"cstack"定义为0x20001000~0x20001fff。那__sfe( "cstack" ) 就得到0x20002000这个值，刚好用来初始化msp堆栈指针。
注意使用segment operator前，需要先定义段名如下：
#pragma segment="cstack"

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